Exploiting Device Mismatch in Neuromorphic VLSI Systems to Implement Axonal Delays

Sheik S, Chicca E, Indiveri G. Exploiting Device Mismatch in Neuromorphic VLSI Systems to Implement Axonal Delays. Presented at the International Joint Conference on Neural Networks (IJCNN), Brisbane, Australia.Axonal delays are used in neural computation to implement faithful models of biological neural systems, and in spiking neural networks models to solve computationally demanding tasks. While there is an increasing number of software simulations of spiking neural networks that make use of axonal delays, only a small fraction of currently existing hardware neuromorphic systems supports them. In this paper we demonstrate a strategy to implement temporal delays in hardware spiking neural networks distributed across multiple Very Large Scale Integration (VLSI) chips. This is achieved by exploiting the inherent device mismatch present in the analog circuits that implement silicon neurons and synapses inside the chips, and the digital communication infrastructure used to configure the network topology and transmit the spikes across chips. We present an example of a recurrent VLSI spiking neural network that employs axonal delays and demonstrate how the proposed strategy efficiently implements them in hardware

Characterizing the firing properties of an adaptive analog VLSI neuron

Ben Dayan Rubin D, Chicca E, Indiveri G. Characterizing the firing properties of an adaptive analog VLSI neuron. Biologically Inspired Approaches to Advanced Information Technology. 2004;3141:189-200.We describe the response properties of a compact, low power, analog circuit that implements a model of a leaky-Integrate & Fire (I&F) neuron, with spike-frequency adaptation, refractory period and voltage threshold modulation properties. We investigate the statistics of the circuit's output response by modulating its operating parameters, like refractory period and adaptation level and by changing the statistics of the input current. The results show a clear match with theoretical prediction and neurophysiological data in a given range of the parameter space. This analysis defines the chip's parameter working range and predicts its behavior in case of integration into large massively parallel very-large-scale-integration (VLSI) networks

A Hardware-friendly Neuromorphic Spiking Neural Network for Frequency Detection and Fine Texture Decoding

Humans can distinguish fabrics by their textures, even when they are finer than the density of tactile sensors. Evidence suggests that this ability is produced by the nervous system using an active touch strategy. When the finger slides over a texture, the nervous system converts the texture’s spatial period into an equivalent spiking frequency. Many studies focused on modeling the biological encoding part that translates the spatial frequency into a temporal spiking frequency, but few explored the decoding part. In this work, we propose a novel approach based on a spiking neural network able to detect the frequency of an input signal. Inspired by biological evidence, our architecture detects the range in which the encoded frequency dwells and could therefore decode the texture’s spatial period. The network has been designed to be composed of existing neuromorphic spiking primitives. This property enables a straightforward implementation on integrated silicon circuits, allowing the texture decoding at the edge of the sensor

Reliable Computation in Noisy Backgrounds Using Real-Time Neuromorphic Hardware

Wang H-P, Chicca E, Indiveri G, Sejnowski TJ. Reliable Computation in Noisy Backgrounds Using Real-Time Neuromorphic Hardware. Presented at the Biomedical Circuits and Systems Conference (BIOCAS), Montreal, Que.Spike-time based coding of neural information, in contrast to rate coding, requires that neurons reliably and precisely fire spikes in response to repeated identical inputs, despite a high degree of noise from stochastic synaptic firing and extraneous background inputs. We investigated the degree of reliability and precision achievable in various noisy background conditions using real-time neuromorphic VLSI hardware which models integrate-and-fire spiking neurons and dynamic synapses. To do so, we varied two properties of the inputs to a single neuron, synaptic weight and synchrony magnitude (number of synchronously firing pre-synaptic neurons). Thanks to the realtime response properties of the VLSI system we could carry out extensive exploration of the parameter space, and measure the neurons firing rate and reliability in real-time. Reliability of output spiking was primarily influenced by the amount of synchronicity of synaptic input, rather than the synaptic weight of those synapses. These results highlight possible regimes in which real-time neuromorphic systems might be better able to reliably compute with spikes despite noisy input

Artificial Cognitive Systems: From VLSI Networks of Spiking Neurons to Neuromorphic Cognition

Neuromorphic engineering (NE) is an emerging research field that has been attempting to identify neural types of computational principles, by implementing biophysically realistic models of neural systems in Very Large Scale Integration (VLSI) technology. Remarkable progress has been made recently, and complex artificial neural sensory-motor systems can be built using this technology. Today, however, NE stands before a large conceptual challenge that must be met before there will be significant progress toward an age of genuinely intelligent neuromorphic machines. The challenge is to bridge the gap from reactive systems to ones that are cognitive in quality. In this paper, we describe recent advancements in NE, and present examples of neuromorphic circuits that can be used as tools to address this challenge. Specifically, we show how VLSI networks of spiking neurons with spike-based plasticity mechanisms and soft winner-take-all architectures represent important building blocks useful for implementing artificial neural systems able to exhibit basic cognitive abilitie

Synthesizing cognition in neuromorphic electronic systems

The quest to implement intelligent processing in electronic neuromorphic systems lacks methods for achieving reliable behavioral dynamics on substrates of inherently imprecise and noisy neurons. Here we report a solution to this problem that involves first mapping an unreliable hardware layer of spiking silicon neurons into an abstract computational layer composed of generic reliable subnetworks of model neurons and then composing the target behavioral dynamics as a “soft state machine” running on these reliable subnets. In the first step, the neural networks of the abstract layer are realized on the hardware substrate by mapping the neuron circuit bias voltages to the model parameters. This mapping is obtained by an automatic method in which the electronic circuit biases are calibrated against the model parameters by a series of population activity measurements. The abstract computational layer is formed by configuring neural networks as generic soft winner-take-all subnetworks that provide reliable processing by virtue of their active gain, signal restoration, and multistability. The necessary states and transitions of the desired high-level behavior are then easily embedded in the computational layer by introducing only sparse connections between some neurons of the various subnets. We demonstrate this synthesis method for a neuromorphic sensory agent that performs real-time context-dependent classification of motion patterns observed by a silicon retina

A neuromorphic approach to auditory pattern recognition in cricket phonotaxis

Rost T, Ramachandran H, Nawrot MP, Chicca E. A neuromorphic approach to auditory pattern recognition in cricket phonotaxis. In: 2013 European Conference on Circuit Theory and Design (ECCTD). IEEE; 2013: 1-4.Developing neuromorphic computing paradigms that mimic nervous system function is an emerging field of research with high potential for technical applications. In the present study we take inspiration from the cricket auditory system and propose a biologically plausible neural network architecture that can explain how acoustic pattern recognition is achieved in the cricket central brain. Our circuit model combines two key features of neural processing dynamics: Spike Frequency Adaptation (SFA) and synaptic short term plasticity. We developed and extensively tested the model function in software simulations. Furthermore, the feasibility of an analogue VLSI implementation is demonstrated using a multi-neuron chip comprising Integrate-and-Fire (IF) neurons and adaptive synapses

Vector Symbolic Finite State Machines in Attractor Neural Networks

Hopfield attractor networks are robust distributed models of human memory. We propose construction rules such that an attractor network may implement an arbitrary finite state machine (FSM), where states and stimuli are represented by high-dimensional random bipolar vectors, and all state transitions are enacted by the attractor network's dynamics. Numerical simulations show the capacity of the model, in terms of the maximum size of implementable FSM, to be linear in the size of the attractor network. We show that the model is robust to imprecise and noisy weights, and so a prime candidate for implementation with high-density but unreliable devices. By endowing attractor networks with the ability to emulate arbitrary FSMs, we propose a plausible path by which FSMs may exist as a distributed computational primitive in biological neural networks